? Low frequency peripheral functionality (RTC, Watchdog, LCD, LEUART, I C, LETIMER, PCNT) is
...the world's most energy friendly microcontrollers
? The low frequency oscillator and clock trees are active
2
available
? Wakeup through peripheral interrupt or asynchronous pin interrupt
? RAM and register values are preserved
10.3.1.4 EM3
Wakeup through asynchronous pin interrupts, I C address recognition or ACMP edge interrupt
?
?
?
?
?
Both high and low frequency oscillators and clock trees are inactive
2
Watchdog enabled when 1 kHz clock has been selected
All other peripheral functionality is disabled
RAM and register values are preserved
10.3.1.5 EM4
? All oscillators and regulators are inactive
? RAM and register values are not preserved
? Wakeup from external pin reset
10.3.2 Entering a Low Energy Mode
A low energy mode is entered by first configuring the desired Energy Mode through the EMU_CTRL
register and the SLEEPDEEP bit in the Cortex-M3 System Control Register, see Table 10.2 (p. 87) .
A Wait For Interrupt (WFI) or Wait For Event (WFE) instruction from the Cortex-M3 triggers the transition
into a low energy mode.
The transition into a low energy mode can optionally be delayed until the lowest priority Interrupt Service
Routine (ISR) is exited, if the SLEEPONEXIT bit in the Cortex-M3 System Control Register is set.
Entering the lowest energy mode, EM4, is done by writing a sequence to the EM4CTRL bitfield in
the EMU_CTRL register. Writing a zero to the EM4CTRL bitfield will restart the power sequence.
EM2BLOCK prevents the EMU to enter EM2 or lower, and it will instead enter EM1.
EM3 is equal to EM2, except that the LFACLK/LFBCLK are disabled in EM3. The LFACLK/LFBCLK
must be disabled by the user before entering low energy mode.
The EMVREG bit in EMU_CTRL can be used to prevent the voltage regulator from being turned off in
low energy modes. The device will then essentially stay in EM1 when entering a low energy mode.
Table 10.2. EMU Entering a Low Energy Mode
Low Energy Mode
EM4CTRL
EMVREG
EM2BLOCK
SLEEPDEEP
Cortex-M3
Instruction
EM1
EM2
EM4
0
0
Write sequence:
x
0
x
x
0
x
0
1
x
WFI or WFE
WFI or WFE
x
2, 3, 2, 3, 2, 3, 2,
3, 2
(‘x’ means don’t care)
10.3.3 Leaving a Low Energy Mode
In each low energy mode a selection of peripheral units are available, and software can either enable or
disable the functionality. Enabled interrupts that can cause wakeup from a low energy mode is shown
2011-04-12 - d0001_Rev1.10
87
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